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ZL30262
  • ZL30262

ZL30262

In Production

The miClockSynth ZL30262 high-performance, any-rate multiplier and clock generator device simplifies board design by generating ultra-low-jitter clock signals from a single crystal or crystal oscillator while generating additional independent frequency families. With two independent frequency families on one chip, best-in-class jitter performance, and fractional-N APLL with both a fractional and integer divider. The ZL30262 creates a complete clock-tree, improving design reliability, reducing bill of materials (BOM) cost, and simplifying design by replacing multiple crystals and peripheral timing components. ...

Microchip Technology ZL30262 Product Info

16 April 2026 0

Parameters

# of Outputs

10

Output Frequency Max. (MHz)

1045

Output Frequency Min. (MHz)

1E-06

OutputLogic

LVDS, LVPECL, HCSL, CMOS, HSTL

PCIe Gen

1/2/3/4/5/6/7

Product Type

Low-Jitter Clock Generators

PullRange

0

Voltage

2.5, 3.3

Features

  • Single APLL with fractional and integer dividers creating two independent frequency families
  • Automatic self-configuration at power-up from EXTERNAL EEPROM (see ZL30263 for internal EEPROM); up to 8 configurations pin-selectable
  • Four Flexible Input Clocks: One crystal/CMOS input, Two differential/CMOS inputs, One single-ended/CMOS input
  • Any input frequency from 9.72MHz to 1.25GHz (300MHz max for CMOS)
  • Activity monitors, automatic or manual switching
  • Glitch-less clock switching by pin or register
  • 10 Any-Frequency, Any-Format Outputs
  • Any output frequency from 1Hz to 1045MHz
  • High-resolution frac-N APLL with 0ppm error
  • Output jitter from integer multiply and dividers as low as 0.17ps RMS (12kHz-20MHz)
  • Output jitter from fractional dividers is typically < 1ps RMS, many frequencies <0.5ps RMS
  • Each output has an independent divider and is configurable as LVDS, LVPECL, HCSL, 2xCMOS or HSTL
  • In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz)
  • Multiple output supply voltage banks with CMOS output voltages from 1.5V to 3.3V
  • Precise output alignment circuitry and per-output phase adjustment
  • Per-output enable/disable and glitch-less start/stop (stop high or low)
  • External feedback for zero-delay applications
  • Numerically controlled oscillator mode
  • Spread-spectrum modulation mode
  • Generates PCIe 1, 2, 3, 4, 5, 6, & 7 compliant clocks
  • Easy-to-configure design requires no external VCXO or loop filter components
  • SPI or I2C processor Interface
  • Core supply voltage options: 2.5V only, 3.3V only, 1.8V+2.5V or 1.8V+3.3V
  • Space-saving 8x8mm QFN56 (0.5mm pitch)

    • Description

    The miClockSynth ZL30262 high-performance, any-rate multiplier and clock generator device simplifies board design by generating ultra-low-jitter clock signals from a single crystal or crystal oscillator while generating additional independent frequency families.

    With two independent frequency families on one chip, best-in-class jitter performance, and fractional-N APLL with both a fractional and integer divider. The ZL30262 creates a complete clock-tree, improving design reliability, reducing bill of materials (BOM) cost, and simplifying design by replacing multiple crystals and peripheral timing components.


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