0
In Production
Description |
1:9 |
Input |
LVPECL/LVDS/LVHSTL/CML/SSTL/HCSL |
Output |
LVPECL |
Supply Voltage |
3.3 |
Max Freq (GHz) |
0.5 |
Icc (mA) |
80 |
Max Within Device Skew (ps) |
50 |
OE |
True |
Input Mux |
True |
Number Of Outputs |
0 |
Buffer Type |
Fanout |
Fanout |
1:9 |
Max Prop Delay (ps) |
2000 |
The SY898531L is a 3.3V, low skew, 1:9 LVPECL fanout buffer with two selectable clock input pairs. Most standard differential input levels can be applied to the CLK, /CLK pair while LVPECL, CML, or SSTL input levels can be applied to the PCLK, /PCLK pair. To eliminate runt pulses on the outputs during asynchronous assertion/de-assertion of the clock enable pin, the clock enable is synchronized with the input signal.The SY898531L operates from a 3.3V ±5% supply and is guaranteed over the full industrial temperature range of 0°C to +70°C. The SY898531L is part of Micrel’s highspeed, Precision Edge product line.