• Serial Interface Architecture: Nibble-wide multiplexed I/O’s with SPI-like serial command structure
• Mode 0 and Mode 3
• x1/x2/x4 Serial Peripheral Interface (SPI) Protocol -Burst Modes
• Continuous linear burst, 8/16/32/64 Byte linear burst with wrap-around
• Page-Program: 256 Bytes per page in x1 or x4 mode
• Flexible Erase Capability: Uniform 4 KByte sectors, Four 8 KByte top and bottom parameter overlay blocks, One 32 KByte top and bottom overlay block, Uniform 64 KByte overlay blocks
• Software Write Protection: Individual Block-Locking: 64 KByte blocks, two 32 KByte blocks, and eight 8 KByte parameter blocks
• Low Power Consumption: Active Read current: 15 mA (typical at 104 MHz), Standby Current: 10 µA (typical)
• SFDP (Serial Flash Discoverable Parameters)
• Packages Available: 8-contact WSON (6mm x 5mm), 8-lead SOIC (150 mil), 8-contact USON (2mm x 3mm), 8-ball XFBGA (Z-Scale)
• All devices are RoHS compliant

The SST26WF040B/040BA Serial Quad I/O (SQI) flash device utilizes a 4-bit multiplexed I/O serial interface to boost performance while maintaining the compact form factor of standard serial flash devices. SST26WF040B/040BA also supports full command-set compatibility to traditional Serial Peripheral Interface (SPI) protocol. Operating at frequencies reaching 104 MHz, the SST26WF040B/040BA enables minimum latency execute-in-place (XIP) capability without the need for code shadowing on an SRAM. The SST26WF040B/040BA writes (Program or Erase) with a single power supply of 1.65-1.95V and significantly lower power consumption. The device’s low power consumption makes it the ideal choice for Mobile handset, Bluetooth, GPS, camera module, table, hearing aid and any battery powered devices. Further benefits are achieved with SST’s proprietary, high-performance CMOS SuperFlash® technology, which significantly improves performance and reliability.

The SST26WF040B default at power up is with WP# and HOLD pins enable and SIO2 and SIO3 pins disable allowing for SPI protocol operations without register configuration.
The SST26WF040BA default at power up is with WP# and HOLD pins disable and SIO2 and SIO3 pins enable allowing for Quad I/O operations without register configuration.