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PIC18F46Q24
  • PIC18F46Q24
  • PIC18F46Q24
  • PIC18F46Q24

PIC18F46Q24

In Production

The PIC18-Q24 microcontroller family offers a range of features and capabilities for sensor-interfacing, real-time control, and communication applications. This family introduces the Programming and Debugging Interface Disable module to increase code and data protection. It includes a Multi-Voltage I/O interface, a 10-bit Analog-to-Digital Converter with Computation, and an 8-bit Signal Routing Port module for interconnecting digital peripherals. This family of devices also has additional features like a Vectored Interrupt Controller, DMA capabilities, various communication protocols (UART, SPI, I2C), and memory features such as Memory Access Partition and Device Information Area....

Microchip Technology PIC18F46Q24 Product Info

16 April 2026 0

Parameters

ADC Resolution (bits)

10

Number of Comparators

2

Data EEPROM (bytes)

512

MVIO Pins

12

Operation Voltage Max.(V)

5.5

Operation Voltage Min.(V)

1.8

RAM B (byte)

4096

Program Memory Size (KB)

64

Low Power

Yes

ADC Channels

22

Pincount

40

Stand alone PWM

3

Zero Cross Detect

Yes

Features

    Multi-Voltage I/O (MVIO):
  • MVIO-powered pins support operation from 1.62V to 5.5V
  • This domain is independent of the main VDD voltage level
  • Voltage monitoring on the additional voltage domain with programmable trip points
    Programming and Debugging Interface Disable (PDID):
  • The ICSP interface can be disabled to prevent external memory access or modifications.
    Vectored Interrupt (VI) Capability - Faster interrupt response time
  • Selectable high/low priority
  • Programmable vector table base address
  • Fixed interrupt latency of three instruction cycles
  • Backwards compatible with previous interrupt capabilities
    Memory Access Partition (MAP): The Program Flash Memory can be partitioned into:
  • Application Block
  • Boot Block
  • Storage Area Flash (SAF) Block with SAFLOCK to prevent modifications
    Programming/Debugging Features:
  • Programming and Debugging Interface Disable (PDID)
  • In-Circuit Serial Programming™ (ICSP™) via Two Pins
  • In-Circuit Debug (ICD) with Three Breakpoints via Two Pins
  • Debug Integrated On-Chip
    Analog-to-Digital Converter with Computation (ADCC):
  • 10-bit ADC with computation with up to 300ksps
  • Up to 30 external channels
  • Automated math functions on input signals such as averaging, filter calculations, oversampling and threshold comparison
  • Operates in Sleep
  • Five internal analog channels
  • Hardware Capacitive Voltage Divider (CVD) Support:
  • Automates touch sampling and reduces software size and CPU usage
    Voltage Reference:
  • Fixed Voltage Reference with 1.024V, 2.048V and 4.096V output levels
  • Internal connections to ADC, Comparator, and DAC
    Two SPI modules:
  • Configurable length bytes
  • Arbitrary length data packets
  • Transmit-without-Receive and Receive-without-transmit option
  • Transfer byte counter
  • Separate transmit and receive buffers with 2-byte FIFO and DMA capabilities
    Two I2C module, SMBus, PMBus™ Compatible:
  • 7-bit and 10-bit addressing modes with address masking modes
  • Dedicated address, transmit and receive buffers and DMA capabilities
  • I2C, SMBus 2.0 and SMBus 3.0, and 1.8V input level selections
  • Multi-Master mode, including self-addressing
    Device Information Area (DIA) Stores:
  • Temperature Indicator factory calibrated data
  • Fixed Voltage Reference measurement data
  • Microchip Unique Identifier
    Low Power Mode Features:
  • Sleep: < 1μA typical @ 3V
  • Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower)
  • Idle: CPU Halted While Peripherals Operate
  • Sleep: Lowest Power Consumption
    Peripheral Module Disable (PMD):
  • Selectively disable the hardware module to minimize active power consumption of unused peripherals

Description

The PIC18-Q24 microcontroller family offers a range of features and capabilities for sensor-interfacing, real-time control, and communication applications. This family introduces the Programming and Debugging Interface Disable module to increase code and data protection. It includes a Multi-Voltage I/O interface, a 10-bit Analog-to-Digital Converter with Computation, and an 8-bit Signal Routing Port module for interconnecting digital peripherals. This family of devices also has additional features like a Vectored Interrupt Controller, DMA capabilities, various communication protocols (UART, SPI, I2C), and memory features such as Memory Access Partition and Device Information Area.

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