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MIC68220
  • MIC68220

MIC68220

In Production

The MIC68220 is a dual high peak current LDO regulator designed specifically for powering applications such as FPGA core voltages that require high start-up current with lower nominal operating current. Capable of sourcing 2A of current per channel for start-up. The MIC68220 can also implement a variety of power-up and power-down protocols such as sequencing, tracking, and ratiometric tracking. The MIC68220 operates from a wide input range of 1.65V to 5.5V, which includes all of the main supply voltages commonly available today. It is designed to drive digital circuits requiring low voltage at high currents (i.e. PLDs, DSP, microcontroller, etc.). The MIC68220 incorporates a delay pin (Delay) for control of power on reset output (POR) at turn-on and power-down delay at ...

Microchip Technology MIC68220 Product Info

16 April 2026 0

Parameters

VIN Min (V) V (volt)

1.65

VIN Max V (volt)

5.5

IOUT #1 Max mA (milliampere)

2000

IOUT #2 Max mA (milliampere)

2000

Quiescent Current µA (microampere)

1500

Voltage Drop Typ (mV)

300

Accuracy (+/-) %

2

Adjustable VOUT

Yes

Reverse Battery

No

Bypass Pin

No

Current Limit

Yes

Shutdown EN

Yes

Power Good Signal

Yes

Thermal Shutdown

Yes

Features

  • Stable with 4.7µF ceramic output capacitor
  • Input voltage range: 1.65V to 5.5V
  • 0.5V reference
  • ±1.0% initial output tolerance
  • 2A maximum output current - peak start up
  • 1A Continuous operating current
  • Tracking on turn-on and turn-off with pin strapping
  • Timing controlled sequencing on/off
  • Programmable Ramp Control™ for in-rush current limiting and slew rate control of the output voltage on Turn-On and Turn-Off
  • Power-on Reset (POR) supervisor with programmable delay time
  • Single Master can control multiple Slave regulators with tracking output voltages
  • Maximum dropout (VIN - VOUT) of 500mV over temperature at 1A output current
  • Fixed and adjustable output voltages
  • Excellent line and load regulation specifications
  • Logic controlled shutdown
  • Thermal shutdown and current limit protection

Description

The MIC68220 is a dual high peak current LDO regulator designed specifically for powering applications such as FPGA core voltages that require high start-up current with lower nominal operating current. Capable of sourcing 2A of current per channel for start-up. The MIC68220 can also implement a variety of power-up and power-down protocols such as sequencing, tracking, and ratiometric tracking.

The MIC68220 operates from a wide input range of 1.65V to 5.5V, which includes all of the main supply voltages commonly available today. It is designed to drive digital circuits requiring low voltage at high currents (i.e. PLDs, DSP, microcontroller, etc.). The MIC68220 incorporates a delay pin (Delay) for control of power on reset output (POR) at turn-on and power-down delay at turn-off. In addition there is a Ramp Control (RC) pin for either tracking applications or output voltage slew rate adjustment at turn-on and turn-off. This is important in applications where the load is highly capacitive and in-rush currents can cause supply voltages to fail and microprocessors or other complex logic chips to hang up.

The MIC68220 can be configured in two modes. In tracking mode, the output voltage of Vout1 drives the RC2 pin so that the Vout2 tracks Vout1 during turn-on and turn-off. In sequencing mode, POR1 of Vout1 drives the enable pin (EN2) of Vout2 so that it turns on after the Vout1 and turns off before (or after) Vout1. This behavior is critical for power-up and power-down control in multi-output power supplies. The MIC68220 is fully protected offering both thermal and current limit protection, and reverse current protection.

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