A unique architecture allows the LAN91C93I to combine high performance, flexibility, high integration and simple software interface. The LAN91C93I incorporates the LAN91C92 functionality for local bus environments. The LAN91C93I consists of the same logical I/O register structure in local bus modes. The MMU (Memory Management Unit) architecture used by the LAN91C93I combines the simplicity and low overhead of fixed areas with the flexibility of linked lists providing improved performance over other methods. Packet reception and transmission are determined by memory availability. All other resources are always available if memory is available. To complement this flexible architecture, bus interface functions are incorporated in the LAN91C93I, as well as a 6144 byte packet RAM - and serial EEPROM-based setup. The user can select or modify configuration choices. The LAN91C93I integrates most of the 802.3 functionality, incorporating the MAC layer protocol, the physical layer encoding and decoding functions with the ability to handle the AUI interface. For twisted pair networks, LAN91C93I integrates the twisted pair transceiver as well as the link integrity test functions. 

Microchip's complimentary and confidential MicroCHECK design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.