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HV5622
  • HV5622
  • HV5622
  • HV5622

HV5622

In Production

The HV5622 is a low-voltage serial to high-voltage parallel converter with open drain outputs. This device has been designed for use as a driver for AC-electroluminescent displays. It can also be used in any application requiring multiple output high voltage current sinking capabilities such as driving inkjet and electrostatic print heads, plasma panels, vacuum fluorescent, or large matrix LCD displays. This device consists of a 32-bit shift register, 32 latches, and control logic to perform the polarity select and blanking of the outputs. Data is shifted through the shift register on the high to low transition of the clock. The HV5622 shifts in the clockwise direction when viewed from the top of the package. A data output buffer is provided for cascading devices. This output reflects the...

Microchip Technology HV5622 Product Info

16 April 2026 0

Parameters

Type

Sink

Output Channels

32

Vout Operating (V) - Transient

230

Vout Operating (V) - Sustained

220

Iout (mA) per Channel

100

Output Structure

Open Drain

Input Structure

Serial

Minimum Data Clock (MHz)

8

General Description

Serial to parallel converter with latches, polarity, and blanking

Package

44/PQFP 44/WQFN 44/PLCC

Features

    • Processed with HVCMOS® technology
    • Sink current minimum 100mA
    • Shift register speed 8.0MHz
    • Polarity and Blanking inputs
    • CMOS compatible inputs
    • Forward and reverse shifting options
    • Diode to VPP allows efficient power recovery

Description

The HV5622 is a low-voltage serial to high-voltage parallel converter with open drain outputs. This device has been designed for use as a driver for AC-electroluminescent displays. It can also be used in any application requiring multiple output high voltage current sinking capabilities such as driving inkjet and electrostatic print heads, plasma panels, vacuum fluorescent, or large matrix LCD displays. This device consists of a 32-bit shift register, 32 latches, and control logic to perform the polarity select and blanking of the outputs. Data is shifted through the shift register on the high to low transition of the clock. The HV5622 shifts in the clockwise direction when viewed from the top of the package. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the LE (latch enable), BL (blanking), or the POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored when LE is low.

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