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HV5408
  • HV5408

HV5408

In Production

The HV5408B is a low voltage serial to high voltage parallel converter with push-pull outputs. This device has been designed for use as a driver for AC-electroluminescent displays. It can also be used in any application requiring multiple output high voltage current sourcing and sinking capabilities, such as driving plasma panels, vacuum fluorescent, or large matrix LCD displays.  The HV5408B consists of a 32-bit shift register, 32 latches, and control logic to enable outputs. Q1 is connected to the first stage of the shift register through the Output Enable logic. Data is shifted through the shift register on the low to high transition of the clock. When viewed from the top of the package, the HV5408B shifts in the counter-clockwise d...

Microchip Technology HV5408 Product Info

16 April 2026 0

Parameters

Type

Source-Sink

Output Channels

32

Vout Operating (V) - Transient

90

Vout Operating (V) - Sustained

80

Iout (mA) per Channel

±20

Output Structure

Half-Bridge

Input Structure

Serial

Minimum Data Clock (MHz)

8

General Description

Serial to parallel converter with latches, and output enable

Package

44/PQFP 44/PLCC

Features

    • Processed with HVCMOS® technology
    • Low power level shifting 
    • SOURCE/SINK current minimum 20mA
    • Shift register speed 8.0MHz 
    • Latched data outputs
    • CMOS compatible inputs
    • Forward and reverse shifting options
    • Diode to VPP allows efficient power recovery

Description

The HV5408B is a low voltage serial to high voltage parallel converter with push-pull outputs. This device has been designed for use as a driver for AC-electroluminescent displays. It can also be used in any application requiring multiple output high voltage current sourcing and sinking capabilities, such as driving plasma panels, vacuum fluorescent, or large matrix LCD displays.  The HV5408B consists of a 32-bit shift register, 32 latches, and control logic to enable outputs. Q1 is connected to the first stage of the shift register through the Output Enable logic. Data is shifted through the shift register on the low to high transition of the clock. When viewed from the top of the package, the HV5408B shifts in the counter-clockwise direction. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register (32). Operation of the shift register is not affected by the LE (latch enable) or the OE (output enable) inputs. Transfer of data from the shift register to the latch occurs when the LE input is high. The data in the latch is retained when LE is low.

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