0
In Production
GPIO Pins |
40 |
IDCompIOCntrl |
34 |
Op Temp Max |
85 |
Op Temp Min |
-40 |
PS/2 Ports |
0 |
The ECE1200 is a device designed to implement a Bridge function from an eSPI-configured Intel Chipset to a legacy downstream system, providing Master interfaces for an LPC bus, Serial IRQ and CLKRUN# features.
The ECE1200 is directly powered by two Suspend (S5) supply planes, at 3.3V and 1.8V nominal. The 1.8V supply is provided on two sets of pins: VTR_18 for I/O pins, and VTR_18_CORE for internal logic. The 3.3V supply VTR_33 is for 3.3V I/O pins only.
The ECE1200 senses a Runtime power plane (VCC) using the pin LPC_EN, which is intended to come from the PCH_PWROK signal supplied from the system. It uses this to emulate VCC-powered functionality on the appropriate pins in order to avoid backdrive in the system.