Advanced DPLL Technology
• Programmable PLL bandwidth: 18Hz to 400Hz
• Hitless Reference Switching, Automatic or Manual
• Holdover on Loss of All Input References
• Frequency Conversion Among SONET/SDH, PDH, Ethernet, Wireless, and CMTS Rates

Five Input Clocks
• Two CMOS/TTL (≤ 125MHz)
• Two LVDS/LVPECL/CMOS/TTL (≤ 156.25MHz)
• Backup Input (CMOS/TTL) in Case of Complete Loss of System Timing References
• Three Optional Frame-Sync Inputs (CMOS/TTL)
• Continuous Input Clock Quality Monitoring
• Numerous Input Clock Frequencies Supported below:
• Ethernet xMII: 2.5, 25, 125, 156.25MHz
• SONET/SDH: 6.48, N x 19.44, N x 51.84MHz
• PDH: N x DS1, N x E1, N x DS2, DS3, E3
• Frame Sync: 2kHz, 4kHz, 8kHz
• Custom: Any Multiple of 2kHz Up to 131.072MHz, Any Multiple of 8kHz Up to 155.52MHz

Two Output Clocks
• One CMOS/TTL Output (≤ 125MHz)
• One LVDS/LVPECL Output (≤ 312.50MHz)
• Two Optional Frame-Sync Outputs: 2kHz, 8kHz
• Numerous Output Clock Frequencies Supported below:
• Ethernet xMII: 2.5, 25, 125, 156.25, 312.5MHz
• SONET/SDH: 6.48, N x 19.44, N x 51.84MHz
• PDH: N x DS1, N x E1, N x DS2, DS3, E3
• Frame Sync: 2kHz, 8kHz
• Other: 10, 10.24, 13, 30.72MHz
• Custom Clock Rates: Any Multiple of 2kHz Up to 77.76MHz, Any Multiple of 8kHz Up to 311.04MHz, Any Multiple of 10kHz Up to 388.79MHz

General
• Suitable Line Card IC for Stratum 3E/3/4, SMC, SEC
• Internal Compensation for Master Clock Oscillator
• SPI™ Processor Interface
• 1.8V Operation with 3.3V I/O (5V Tolerant)
• Industrial Operating Temperature Range

Applications/Uses
• SONET/SDH, Synchronous Ethernet, PDH, and Other Line Cards in WAN Equipment Including MSPPs, Ethernet Switches, Routers, DSLAMs, and Wireless Base Stations

The DS3105 is a low-cost, feature-rich timing IC for telecom line cards. Typically, the device accepts two reference clocks from dual redundant system timing cards. The DS3105 continually monitors both inputs and performs automatic hitless reference switching if the primary reference fails. The highly programmable DS3105 supports numerous input and output frequencies including frequencies required for SONET/SDH, Synchronous Ethernet (1G, 10G, and 100Mbps), wireless base stations, and CMTS systems. PLL bandwidths from 18Hz to 400Hz are supported, and a wide variety of PLL characteristics and device features can be configured to meet the needs of many different applications.

The DS3105 register set is backward compatible with Semtech's ACS8525 line card timing IC. The DS3105 pinout is similar but not identical to the ACS8525.

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