0
In Production
BVdss min (V) |
500 |
Rds (on) max (Ohms) |
10 |
Vgs(off) Min V (volt) |
-1.5 |
Vgs(off) Max V (volt) |
-3.5 |
Package |
DPAK, SOT-89 |
These low threshold depletion-mode (normally-on) transistors utilize an advanced vertical DMOS structure and well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
