AVR SD Product Family Page

Functional Safety Hardware Enhancements
• Dual-core lock-step AVR CPU running up to 20 MHz
• ECC on Flash, SRAM and EEPROM
• Dedicated Error-Controller (ERRCTRL)
• Stack monitor
• Core supply voltage monitor with under and over-voltage detection
• Clock Failure Detect (CFD)
• Clock Frequency Monitor
• Trap on Undefined Instructions (illegal opcode)
• Cyclic Redundancy Check (CRC) Scan
• Parity on program and data busses
• Two independent Watchdogs (Synchronous and Asynchronous)
• Program and Debug Interface Disable (PDID)

Analog
• Two 10-bit, 100 ksps, Analog-to-Digital Converters (ADC)
• One 10-bit Digital-to-Analog Converter (DAC)
• Three Analog Comparators
• Two Zero Cross Detectors (ZCD)

Timers
• One 16-bit Timer/Counter type A (TCA) with three compare channels for PWM and waveform generation
• Up to four 16-bit Timer/Counter type B (TCB) with input capture for capture and signal measurements
• One 12-bit Timer/Counter type D (TCD) optimized for power control

Serial Communication Interfaces
• Up to three USARTs
• Two SPI with host/client operation modes
• Two I2C with simultaneous host/client operation (dual mode) and dual address match

For more information visit the AVR SD Product Family page

The AVR® SD microcontroller (MCU) family is designed in compliance with the ISO 26262 and IEC 61508 safety standards.

The ASIL C (ISO 26262) and SIL 2 (IEC 61508) compliant MCU can simplify applications targeting high safety levels up to ASIL D, SIL 3 and Class C (IEC 60730), owing to advanced features like a dual-core lockstep CPU, Error Correction Code (ECC) on Flash, SRAM and EEPROM, error injection support and a dedicated error controller. These hardware safety features reduce software complexity and offer real time response for fault detection, error handling and activating safe states.

The AVR32SD28 is running at up to 20 MHz across the full supply voltage range of 2.7V to 5.5V and is available in 28-pin SPDIP, TQFP and VQFN with Wettable Flanks packages.

Program and Debug Interface Disable (PDID)

The AVR SD MCUs incorporate the PDID feature which makes it possible to disable the programming and debug interfaces after finalizing the application to facilitate secure boot processes. This security measure protects against firmware tampering and unauthorized access, which makes these MCUs an excellent choice for security applications.