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ATUC128L3U
  • ATUC128L3U
  • ATUC128L3U

ATUC128L3U

In Production

The high-performance 32-bit AVR microcontroller is designed for cost-sensitive embedded applications that require low power consumption, high code density, and high performance. The device includes USB Full-speed device interface.The microcontroller's Memory Protection Unit (MPU) and fast, flexible interrupt controller support the latest real-time operating systems. The Secure Access Unit (SAU) with MPU provides enhanced security and integrity. Higher computation capability is achieved using a rich set of DSP instructions.The microcontroller embeds state-of-the-art picoPower technology for ultra-low power consumption. Combinations of power control techniques bring active current consumption down to 165µA/MHz and leakage down to 9nA while still retaining a bank of backup registers. The devi...

Microchip Technology ATUC128L3U Product Info

16 April 2026 0

Parameters

Part Family

AVR L Series

CPU Type

32-bit AVR MCU

MaxSpeed (MHz)

50

Program Memory Size (KB)

128

SRAM (KB)

32

Temp. Range Min.

-40

Temp. Range Max.

85

Operation Voltage Min.(V)

1.62

Operation Voltage Max.(V)

3.6

SPI

1

I2C

2

UART

4

QSPI

0

Crypto Engine

No

Internal Oscillator

120Mhz,115Khz,32Khz

Pin Count

64

Description

The high-performance 32-bit AVR microcontroller is designed for cost-sensitive embedded applications that require low power consumption, high code density, and high performance. The device includes USB Full-speed device interface.

The microcontroller's Memory Protection Unit (MPU) and fast, flexible interrupt controller support the latest real-time operating systems. The Secure Access Unit (SAU) with MPU provides enhanced security and integrity. Higher computation capability is achieved using a rich set of DSP instructions.

The microcontroller embeds state-of-the-art picoPower technology for ultra-low power consumption. Combinations of power control techniques bring active current consumption down to 165µA/MHz and leakage down to 9nA while still retaining a bank of backup registers. The device offers a wide range of trade-offs between functionality and power consumption to reach the lowest possible power usage for the application's required feature set.

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