Processor:
• ARM Cortex®-M23
• 32 MHz (2.62 CoreMark/MHz and up to 31 DMIPS)
• Single-cycle hardware multiplier
• Hardware divider
• Nested Vector Interrupt Controller (NVIC)
• Memory Protection Unit (MPU)

Operating Voltage Range:
• 1.62V to 3.63V

Memory:
• 64 KB Flash
• 16 KB SRAM
• 2 KB Data Flash section for non-volatile data storage
• 256 bytes TrustRAM with physical protection features

Ultra-Low Power:
• Active, Idle, Standby with partial or full SRAM retention and off sleep modes
• Active mode (< 25 μA/MHz)
• Idle mode (< 10 μA/MHz) with 1.5 μs wake-up time
• Standby with Full SRAM Retention (0.5 μA) with 5.3 μs wake-up time
• Off mode (< 100 nA)

Security:
• Secure Boot with SHA-based authentication
• Arm TrustZone for flexible hardware isolation of memories and peripherals
• AES-128, SHA-256, and GCM cryptography accelerators
• Chip-level tamper detection to resist microprobing attacks
• Silent access for side channel attack resistance
• Rapid Tamper Erase on scrambling key and RAM data
• Data remanence prevention
• Address and Data scrambling with user-defined key
• One True Random Generator (TRNG)

Enhanced Peripheral Touch Controller (PTC):
• Driven Shield Plus for moisture tolerance and noise immunity
• Parallel Acquisition through Polarity control
• Supports wake-up on touch from Standby Sleep mode

Advanced Analog:
• 12-bit, 1 MSPS Analog-to-Digital Converter (ADC)
• Analog Comparators (AC) with window compare function
• 10-bit, 350 KSPS DAC with external and internal outputs
• Operational Amplifiers

Serial Communication Interfaces (SERCOM) that can operate as:
• USART, I2C, SPI

Qualification and Class-B Support:
• AEC-Q100 REVH (Grade 1 [-40ºC to +125ºC]) (planned)
• Class-B safety library, IEC 60730 (planned)

Temperature options:
• -40 C to 85 C
• -40 C to 125 C

Debugger Development Support:
• Two-pin Serial Wire Debug (SWD) programming and debugging interface

Industry’s first and lowest power Arm® Cortex®-M23 featuring chip-level security and ARM® TrustZone® Technology, consuming less than 25uA/MHz in active mode and less than 100 nA in sleep mode. It features secure key storage, chip-level tamper resistance, crypto accelerators, secure boot, secure bootloader, enhanced peripheral touch controller, advanced analog, ISO7816 smart card interface, event system and SleepWalking peripherals.

SAM L11 achieved EEMBC Certified ULPMark Core Profile score of 410 & Peripheral Profile score of 167.

SAML11-KPH variants (Example part#: ATSAML11D16A-MUKPH) are pre-provisioned with Trustonic Root of Trust key and are supported by Kinibi-M Software Development Kit.

SAML11 variants have the option to be securely key provisioned using Secure Thingz Secure Deploy™ Architecture.

Supported by MPLAB X IDE and MPLAB Harmony.