0
In Production
ADC Resolution (bits) |
10 |
ADC Sampling Rate (ksps) |
440 |
Anti-Tampering Inputs |
0 |
Secure Bootloader |
No |
CAN/CAN-FD |
0 |
Type of CAN module |
None |
Camera Interface |
No |
Internal DRAM MB (megabyte) |
0 |
Ext. DRAM Bus |
16 |
Ext. DRAM Interface |
SDRAM/LPSDRAM/LPDDR/DDR2 |
Number of EBIs |
1 |
ECC bits on NAND interface |
24 |
FPU |
No |
Graphic LCD Interface |
24-bit |
Hardware RTCC/RTC |
Yes |
I/O Pins Max |
105 |
Secure Key Storage (bits) |
0 |
L1 Cache Memory (Data) (KB) |
16 |
L1 Cache Memory (Instructions) (KB) |
16 |
LIN |
Yes |
CPU Speed Max MHz (megahertz) |
400 |
NAND Interface |
Yes |
Operation Voltage Max.(V) |
1.1 |
Operation Voltage Min.(V) |
0.9 |
Internal Oscillator |
No |
Part Family |
SAM9GX |
QSPI |
0 |
SDIO/SD-CARD/eMMC |
2 |
Temp. Sensor |
No |
Watch Dog Timer |
Yes |
Direct Memory Access (DMA) Channels |
20 |
Graphics Controller/GPU |
Yes |
Quadrature Encoder Interface |
0 |
ADC Channels |
12 |
Pincount |
217 |
Crypto Engine |
No |
TempRange Min |
-40 |
TempRange Max |
85 |
The Microchip's ARM®-based SAM9G15 has an ARM926 core and runs at 400 MHz. The SAM9G15 integrates a graphics LCD controller with 4-layer overlay offering picture-in-picture, alpha-blending, scaling, rotation and color conversion, and a 10-bit ADC that supports 4/5-wire resistive touchscreen panels. Multiple communication interfaces include a soft modem supporting exclusively the Conexant SmartDAA line driver, HS USB Host and Device and FS USB Host with on-chip transceivers, two HS SDCard/SDIO/MMC interfaces, USARTs, SPIs, I2S and TWIs. A multi-layer bus matrix is coupled with multiple DMA channels. The external bus interface incorporates controllers offering support for 8-bank DDR2 and for LPDDR, SDRAM/LPSDRAM, static memories, as well as specific circuitry for MLC/SLC NAND Flash with integrated ECC up to 24 bits. The SAM9G15 is available in a 217-ball LFBGA package with 0.8mm ball pitch.
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
