• ARM7TDMI® ARM® Thumb® Processor 32-bit RISC Architecture
• High-density 16-bit Instruction Set
• EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support
• 512 Kbytes (SAM7S512) Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes (Dual Plane)
• 64 Kbytes embedded SRAM, Single-cycle Access at Maximum Speed  
• Memory Controller (MC)
• Memory Protection Unit
• Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
• Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector
• Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL
• Power Management Controller (PMC)
• Advanced Interrupt Controller (AIC)
• Two-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention
• 20-bit Programmable Counter plus 12-bit Interval Counter
• Windowed Watchdog (WDT)
• Real-time Timer (RTT)
• 32 Parallel Input/Output Controllers (PIO)
• Eleven Peripheral DMA Controller (PDC) Channels
• Four High-current Drive I/O lines, Up to 16 mA Each
• 64-lead LQFP
• 64-pad QFN
• One Synchronous Serial Controller (SSC)
• Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
• One Master/Slave Serial Peripheral Interfaces (SPI)
• One USB 2.0 Full Speed (12 Mbits per second) Device Port
• One Three-channel 16-bit Timer/Counter (TC)
• One Four-channel 16-bit PWM Controller (PWMC)
• One Two-wire Interface (TWI)
• One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
• Up to 55 MHz at 1.8V and 85⋅ C Worst Case Conditions
• Up to 48 MHz at 1.65V and 85⋅ C Worst Case Conditions
• SAM-BA - Interface with SAM-BA Graphic User Interface
• IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins

Microchip's ARM®-based SAM7S512 is a member of the SAM7S series of flash microcontrollers based on the 32-bit ARM7TDMI RISC processor. It operates at a maximum speed of 55MHz and features 512KB of dual bank flash memory and 64KB of SRAM.

The peripheral set includes a Full Speed USB device and PHY at 12Mbps, UART, two USARTs, TWI (I²C), SPI, SSC, two PWM timers, three 16-bit timers,RTT, 8x10-bit ADC and 32 IO lines.

It achieves single-cycle instruction access from embedded flash at 27 MIPS. The multi-layer bus matrix, multiple SRAM banks, PDC, and DMA support parallel tasks and maximize data throughput.

The SAM7S512 operates from 1.65V to 3.6V and is available in 64-pin LQFP and QFN packages.