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AT90PWM1
  • AT90PWM1
  • AT90PWM1

AT90PWM1

In Production

Specially designed for lamp ballast and motor control applications, this high-performance Microchip 8-bit AVR RISC-based microcontroller combines 8KB ISP flash memory with read-while-write capabilities, 512B EEPROM, 512-Byte SRAM, 53 general purpose I/O lines, 32 general purpose working registers, 2 12-bit high speed power stage controllers, two flexible timer/counters with compare modes and PWM, an 8-channel/10-bit A/D converter with two differential input stages with programmable gain, programmable watchdog timer with internal oscillator, SPI serial port, an on-chip debugging system, and four software selectable power saving modes. The device operates between 2.7-5.5 volts. By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per...

Microchip Technology AT90PWM1 Product Info

16 April 2026 0

Parameters

Program Memory Size (KB)

8

RAM

0

Data EEPROM (bytes)

512

Pin Count

24

Operation Voltage Max.(V)

5.5

Operation Voltage Min.(V)

2.7

ADC Resolution Max

10

ADC Channels

8

Zero Cross Detect

No

Number of Comparators

2

SPI

1

I2C

0

Stand alone PWM

7

Low Power

No

Numerically Controlled Oscillator (NCO)

0

Data Signal Modulator (DSM)

0

Description

Specially designed for lamp ballast and motor control applications, this high-performance Microchip 8-bit AVR RISC-based microcontroller combines 8KB ISP flash memory with read-while-write capabilities, 512B EEPROM, 512-Byte SRAM, 53 general purpose I/O lines, 32 general purpose working registers, 2 12-bit high speed power stage controllers, two flexible timer/counters with compare modes and PWM, an 8-channel/10-bit A/D converter with two differential input stages with programmable gain, programmable watchdog timer with internal oscillator, SPI serial port, an on-chip debugging system, and four software selectable power saving modes. The device operates between 2.7-5.5 volts.

By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per MHz, balancing power consumption and processor speed.

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