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AT32UC3A3256
  • AT32UC3A3256
  • AT32UC3A3256

AT32UC3A3256

In Production

A complete system-on-chip 32-bit AVR microcontroller. It is designed for cost-sensitive embedded applications that require low power consumption, high code density and high performance. The microcontroller's Memory Protection Unit (MPU) and fast, flexible interrupt controller support the latest real-time operating systems. Higher computation capabilities are achievable using a rich set of DSP instructions. The device incorporates on-chip flash and SRAM memories for secure and fast access. 64 KBytes of SRAM are directly coupled to the 32-bit AVR UC3 for performance optimization. Two blocks of 32 Kbytes SRAM are independently attached to the high speed bus matrix for real ping-pong management.The microcontroller achieves exceptionally high data throughput by combining the multi-layered 32-b...

Microchip Technology AT32UC3A3256 Product Info

16 April 2026 0

Parameters

Part Family

AVR A3/A4 Series

CPU Type

32-bit AVR MCU

MaxSpeed (MHz)

84

Program Memory Size (KB)

256

SRAM (KB)

128

Temp. Range Min.

-40

Temp. Range Max.

85

Operation Voltage Min.(V)

3

Operation Voltage Max.(V)

3.6

SPI

6

I2C

2

UART

4

QSPI

0

Crypto Engine

No

Internal Oscillator

115Khz

Pin Count

144

Description

A complete system-on-chip 32-bit AVR microcontroller. It is designed for cost-sensitive embedded applications that require low power consumption, high code density and high performance.

The microcontroller's Memory Protection Unit (MPU) and fast, flexible interrupt controller support the latest real-time operating systems. Higher computation capabilities are achievable using a rich set of DSP instructions. The device incorporates on-chip flash and SRAM memories for secure and fast access. 64 KBytes of SRAM are directly coupled to the 32-bit AVR UC3 for performance optimization. Two blocks of 32 Kbytes SRAM are independently attached to the high speed bus matrix for real ping-pong management.

The microcontroller achieves exceptionally high data throughput by combining the multi-layered 32-bit AVR databus,128 KB on-chip SRAM with triple high speed interfaces, multi-channel peripheral, memory-to-memory DMA controller, high-speed USB embedded host, SD/SDIO card, MLC NAND flash with ECC, and SDRAM interfaces.

This device features 256KB internal high-speed flash, built-in hi-fi stereo audio D/A converter and full-duplex multi-channel I2S audio interface.

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