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S28HS02GTFPBHV150
  • S28HS02GTFPBHV150

S28HS02GTFPBHV150

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The S28HS02GTFPBHV150 is a 2 Gb SEMPER™ Flash memory using Infineon's 45-nm MIRRORBIT™ technology with dual-die architecture. It supports octal and SPI interfaces up to 400 MBps (DDR, 200 MHz). Operating from 1.7 V to 2.0 V, it is ISO26262 ASIL B compliant and offers ECC for single-bit correction and double-bit detection. Endurance flex architecture enables high-endurance and long retention. Applications include automotive, industrial, and safety-critical systems.

Infineon Technologies S28HS02GTFPBHV150 Product Info

16 April 2026 0

Parameters

Classification

No Certification

Density

2048 MBit

Family

HS-T

Interface Frequency (SDR/DDR) (MHz)

166 / 166

Interfaces

Octal

Lead Ball Finish

Sn/Ag/Cu

Operating Temperature range

-40 °C to 105 °C

Operating Voltage range

1.7 V to 2 V

Operating Voltage

1.8 V

Peak Reflow Temp

260 °C

Planned to be available until at least

2037

Qualification

Industrial

Features

  • Embedded Hamming ECC for error correction
  • 16-byte data unit with 1-bit correction,
  • ECC error reporting via status registers
  • Endurance flex architecture with wear
  • Configurable high endurance or long retention
  • JEDEC JESD251 xSPI compliant interface
  • Supports Octal and legacy SPI interfaces
  • SDR and DDR modes for high-speed access
  • Flexible sector architecture: 4 KB and 256 KB
  • Page programming buffer: 256 or 512 bytes
  • Data integrity check with CRC
  • SafeBoot for initialization and corruption

Description

  • ECC improves data reliability and safety
  • 2-bit error detection prevents data
  • Status registers enable fast diagnostics
  • Wear leveling extends device lifetime
  • Flexible endurance/retention for various
  • xSPI compliance ensures broad compatibility
  • Octal/SPI support eases system integration
  • High-speed modes boost data throughput
  • Flexible sectors fit diverse memory maps
  • Large buffer increases programming speed
  • CRC checks enhance data integrity
  • SafeBoot ensures secure startup

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