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S25HS512TDPMHI010
  • S25HS512TDPMHI010

S25HS512TDPMHI010

Active and preferred

The S25HS512TDPMHI010 is a 512 Mb SEMPER™ NOR Flash using Infineon's 45-nm MIRRORBIT™ technology for endurance and data integrity. It supports uniform and hybrid sector architectures, Quad SPI, Dual SPI, and standard SPI protocols. Read speeds reach 83 MBps (SDR) and 102 MBps (DDR). ISO26262 ASIL B compliance, ECC error correction, and sector protection suit automotive and industrial uses.

Infineon Technologies S25HS512TDPMHI010 Product Info

16 April 2026 0

Parameters

Density

512 MBit

Family

HS-T

Interface Bandwidth

66 MByte/s

Interface Frequency (SDR/DDR) (MHz)

133 / 66

Interfaces

Quad SPI

Lead Ball Finish

Matte Tin Plating

Operating Temperature range

-40 °C to 85 °C

Operating Voltage range

1.7 V to 2 V

Operating Voltage

1.8 V

Peak Reflow Temp

260 °C

Planned to be available until at least

2037

Qualification

Industrial

Features

  • 45-nm MIRRORBIT™ stores 2 bits/cell
  • Uniform and hybrid sector architectures
  • 256/512-byte page programming buffer
  • 1024-byte OTP secure silicon array
  • Quad SPI up to 102 MBps (DDR, 102 MHz)
  • Dual SPI up to 41.5 MBps (SDR, 166 MHz)
  • SPI up to 21 MBps (SDR, 166 MHz)
  • Functional safety: ISO26262 ASIL B compliant
  • Endurance Flex: high-endurance/retention
  • Data integrity CRC and built-in ECC (SECDED)
  • SafeBoot for init failure/config corruption
  • Legacy and advanced sector protection

Description

  • High density, reliable storage in small
  • Flexible sectoring for varied application
  • Fast programming for efficient data handling
  • Secure OTP for device authentication
  • High-speed Quad/Dual SPI for rapid data
  • Industry-leading functional safety for
  • Partitioning optimizes endurance
  • Robust data integrity with CRC and ECC
  • SafeBoot ensures system recovery and uptime
  • Advanced protection prevents unauthorized
  • Instant boot accelerates system startup
  • Hardware reset enables reliable system

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