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S25FS064SDSNFN030
  • S25FS064SDSNFN030

S25FS064SDSNFN030

Active and preferred

Infineon Technologies S25FS064SDSNFN030 Product Info

16 April 2026 0

Parameters

Density

64 MBit

Family

FS-S

Interface Bandwidth

80 MByte/s

Interface Frequency (SDR/DDR) (MHz)

133 / 80

Interfaces

Quad SPI

Lead Ball Finish

Ni/Au

Operating Temperature range

-40 °C to 125 °C

Operating Voltage range

1.7 V to 2 V

Operating Voltage

1.8 V

Peak Reflow Temp

260 °C

Planned to be available until at least

2035

Qualification

Industrial

Features

  • SPI interface with multi-I/O support
  • DDR option for high-speed data transfer
  • 24- or 32-bit address options
  • Compatible command set with S25FL families
  • Multiple read modes: Normal, Fast, Dual
  • 256/512-byte page programming buffer
  • Internal ECC with single bit error correction
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles minimum
  • 20 year data retention minimum
  • 1024-byte OTP array with lockable regions
  • Advanced sector protection with password/boot

Description

  • Multi-I/O SPI enables flexible system design
  • DDR boosts throughput for faster operation
  • 24/32-bit address supports large memory maps
  • Command compatibility eases migration
  • Multiple read modes optimize performance
  • Large page buffer accelerates programming
  • ECC ensures reliable data storage
  • Flexible erase options suit various
  • High endurance reduces maintenance needs
  • Long retention secures critical data
  • OTP region enhances device security
  • Advanced protection prevents unauthorized

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