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S25FL128SAGNFI001
  • S25FL128SAGNFI001

S25FL128SAGNFI001

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The S25FL128SAGNFI001 is a 128 Mb (16 MB) SPI Multi-I/O NOR flash memory based on Infineon's 65-nm MIRRORBIT™ technology and Eclipse architecture. It supports single, dual, and quad SPI modes, including DDR operation, with read speeds up to 52 MBps (104 MHz) in Quad mode and 80 MBps (80 MHz) in Quad DDR.

Infineon Technologies S25FL128SAGNFI001 Product Info

16 April 2026 0

Parameters

Density

128 MBit

Family

FL-S

Interface Bandwidth

52 MByte/s

Interface Frequency (SDR/DDR) (MHz)

133 / -

Interfaces

Quad SPI

Lead Ball Finish

Matte Tin Plating

Operating Temperature range

-40 °C to 85 °C

Operating Voltage range

2.7 V to 3.6 V

Operating Voltage

3 V

Peak Reflow Temp

260 °C

Planned to be available until at least

2035

Qualification

Industrial

Features

  • CMOS 3.0 V core with versatile I/O
  • SPI interface with multi-I/O support
  • DDR and SDR clocking options
  • Extended addressing: 24- or 32-bit
  • Multiple read modes: Normal, Fast, Dual
  • Page programming up to 1.5 MBps
  • Automatic ECC with single-bit correction
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles min
  • 20-year data retention min
  • 1024-byte OTP security region
  • Advanced sector and block protection

Description

  • Flexible I/O simplifies system integration
  • High-speed SPI boosts data throughput
  • DDR/SDR options enable design flexibility
  • Extended addressing supports large memory
  • Multiple read modes optimize performance
  • Fast programming accelerates production
  • ECC improves data reliability
  • Sector options ease legacy migration
  • High endurance lowers maintenance cost
  • Long retention ensures data safety
  • OTP region enables secure device ID
  • Robust protection enhances data security

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