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S25FL064LABNFI041
  • S25FL064LABNFI041

S25FL064LABNFI041

The S25FL064LABNFI041 is a 64 Mb SPI multi-I/O NOR flash memory using 65-nm floating gate technology and a 3.0 V supply. It supports single, dual, and quad I/O, QPI, and DDR read modes up to 108 MHz SDR and 54 MHz DDR. Features include extended addressing, page programming, uniform sector/block/chip erase, and four 256-byte security regions. With 100,000 program-erase cycles, it is ideal for automotive, industrial, and embedded systems requiring reliable storage.

Infineon Technologies S25FL064LABNFI041 Product Info

16 April 2026 0

Parameters

Density

64 MBit

Family

FL-L

Interface Bandwidth

54 MByte/s

Interface Frequency (SDR/DDR) (MHz)

108 / 54

Interfaces

Quad SPI

Lead Ball Finish

Matte Tin Plating

Operating Temperature range

-40 °C to 85 °C

Operating Voltage range

2.7 V to 3.6 V

Operating Voltage

3 V

Peak Reflow Temp

260 °C

Planned to be available until at least

2030

Qualification

Industrial

Features

  • SPI interface with single, dual, quad I/O
  • Supports clock modes 0 and 3
  • Double data rate (DDR), quad peripheral
  • 256-byte page programming buffer
  • Uniform 4 KB, 32 KB, 64 KB, and chip erase
  • 100,000 program-erase cycles minimum
  • 20 year data retention minimum
  • 2.7 V to 3.6 V supply voltage
  • Industrial temperature range: –40°C to +85°C
  • Input signal overshoot tolerance ±1.0 V
  • Power-down and deep power down modes
  • JEDEC JESD216B SFDP compliant

Description

  • Multi-I/O enables flexible host connections
  • DDR and QPI boost read/write throughput
  • Large page buffer speeds up programming
  • Multiple erase sizes simplify memory
  • High endurance for frequent program/erase
  • Long retention ensures reliable data storage
  • Wide supply range supports varied designs
  • Industrial temp range for harsh environments
  • Overshoot tolerance improves signal
  • Low-power modes extend battery life
  • SFDP compliance eases configuration
  • Standard SPI modes ensure compatibility

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