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MAX36010
  • MAX36010

MAX36010

PRODUCTION

Security Supervisor with Tamper Detection and Cryptography Small Footprint Secure Memory with Advanced Security Protection

Analog Devices MAX36010 Product Info

10 February 2026 6

Features

  • Low-Power Security Supervisor Enables Cost-Effective Security Solution
    • 1024B Battery-Backed NV SRAM with High-Speed Erase
    • Battery-Backed Tamper Circuit and RTC
    • Low-Current Battery-Backup Operation
    • Operates from Single 3.3V Supply
  • Security Features Facilitate System-Level Protection
    • Tamper Detection with Fast Wipe Key/Data Detection
    • Secret Key Destruction on Tamper Events
    • Hardware Accelerators for AES, RSA, ECDSA, DES, 3DES, SHA-1, SHA-224, and SHA-256
    • True Hardware Random-Number Generator
    • Temperature and Voltage Sensors to Detect Attacks
    • 2 Pairs of External Sensor Tamper Detects
    • Time Stamp for Tamper Event
    • Encrypted NV SRAM Data Transfer
    • Unique 128-Bit Serial Number
  • Integrated Peripherals Allow for Easy Integration into Applications
    • Programmable Alarm with External Output
    • CPU Supervisor
    • SPI/I²C/UART Interface
    • Up to 4 General-Purpose I/O Pins

Part details & applications

As Internet connectivity and greater intelligence get integrated into more products, these products can also boast more potential points of vulnerability if left unprotected. Embedded security technologies, such as security supervisors, can safeguard these designs from hacking, counterfeiting, and other security breaches faced by Internet of things (IoT) designs. The MAX36010/MAX36011 are low-power security supervisors designed for fiscal memory, internet security, and IP protection applications that require certificate-based or other public key cryptography schemes. The devices also incorporate sophisticated security mechanisms to protect sensitive information in secure memory, two pairs of external sensor input, and environmental monitors (temperature and voltage sensors) that erase the secure memory when an attack condition is detected.

One SPI, one I²C, and one UART interfaces are provided for secure, flexible communication to external system nodes. Device control and configuration are performed through a SPI, I²C, or UART interface.

The MAX36010/MAX36011 include on-chip 1KB secure memory that is always protected by dynamic sensors and environmental sensors. When there is a tamper event, the 1KB secure memory is erased in less than 1μs after the DRS has been completed. Tamper source and time of tamper is recorded in battery-backed registers. The MAX36010/MAX36011 enter a reset state until the tamper source is removed.

A real-time clock (RTC) is used to keep the current date and time. It is also useful when a tamper event happens, the tamper time is recorded and stored in a battery-backed register. The RTC has an alarm function. An alarm can be set 12 days in advance. The application can use the alarm to trigger the host processor on a daily basis for regular status monitoring and time adjusting between the host and MAX36010/MAX36011. When an alarm event happens,

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