ADP7102

RECOMMENDED FOR NEW DESIGNS

20 V, 300 mA, Low Noise, CMOS LDO

Analog Devices ADP7102 Product Info

10 February 2026 6

Features

Input voltage range:
3.3 V to 20 V
Maximum output current:
300 mA
Low noise: 15 μV rms for fixed output versions
PSRR performance of 60 dB at 10 kHz, V_OUT = 3.3 V

Reverse current protection
Low dropout voltage:
200 mV at 300 mA load
Initial accuracy: ±0.8%
See data sheet for additional features

Part details & applications

The ADP7102 is a CMOS, low dropout linear regulator that operates from 3.3 V to 20 V and provides up to 300 mA of output current. This high input voltage LDO is ideal for regulation of high performance analog and mixed signal circuits operating from 19 V to 1.22 V rails. Using an advanced proprietary architecture, it provides high power supply rejection, low noise, and achieves excellent line and load transient response with just a small 1 μF ceramic output capacitor.

The ADP7102 is available in seven fixed output voltage options and an adjustable version, which allows output voltages that range from 1.22 V to V_IN − V_DO via an external feedback divider.

The ADP7102 output noise voltage is 15 μV rms and is independent of the output voltage. A digital power good output allows power system monitors to check the health of the output voltage. A user programmable precision undervoltage lockout function facilitates sequencing of multiple power supplies.

The ADP7102 is available in 8-lead, 3 mm × 3 mm LFCSP and 8-lead SOIC packages. The LFCSP offers a very compact solution and also provides excellent thermal performance for applications requiring up to 300 mA of output current in a small, low-profile footprint.

APPLICATIONS

Regulation to noise sensitive applications:
ADC, DAC circuits, precision amplifiers, high frequency oscillators, clocks, and phase-locked loops
Communications and infrastructure
Medical and healthcare
Industrial and instrumentation

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