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The ADH856S is a wideband time delay device with a 5-bit digital control designed for timing compensation or clock skew management applications. The time delay provides nearly 100 ps (maximum) of delay range with 3 ps resolution and supports 28 Gbps data. The monotonic delay is compensated for stable operation over both power supply and temperature variation.
All differential inputs to the ADH856S are current mode logic (CML) and terminated on chip with 50 Ω to the positive supply ground, GND, and can be ac or dc-coupled. The differential CML outputs are source terminated to 50 Ω and can also be ac or dc-coupled. Connect outputs directly to a 50 Ω ground terminated system or drive devices with CML logic input. The control lines, B4 to B0, are differential CML inputs terminated with 600 Ω to the positive rail, which supports lower power control options. The ADH856S features an output level control pin, VR, that allows loss compensation or signal level optimization. The ADH856S operates from a single −3.3 V supply and is available in a 32-Lead 5 mm × 5 mm LCC package.
Applications