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LTC4300A-3IMS8#TRPBF Datasheet (PDF)8-WFDFN Exposed Pad
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-WFDFN Exposed Pad
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
The LTC4300A-3 hot swappable 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. When the connection is made, the LTC4300A-3 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Rise-time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise-time requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances.
The LTC4300A-3 provides level translation between 3.3V and 5V supplies. The backplane and card can both be powered with supplies ranging from 2.7V to 5.5V. The LTC4300A-3 also incorporates a CMOS threshold ENABLE pin which forces the part into a low current mode and isolates the card from the backplane. When driven to VCC, the ENABLE pin sets normal operation.
The LTC4300A-3 is available in the MSOP and 3mm × 3mm DFN packages.
*Patent pending.
Applications
sales@welllinkchips.com


The above table is for reference only, there may will have some delay for the uncontrollable factors.



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