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ADSP-SC584BBCZ-4A Datasheet (PDF)349-LFBGA, CSPBGA
349-LFBGA, CSPBGA
349-LFBGA, CSPBGA
349-LFBGA, CSPBGA
349-LFBGA, CSPBGA
349-LFBGA, CSPBGA
349-LFBGA, CSPBGA
349-LFBGA, CSPBGA
The ADSP-SC584 processor is part of the new, high-performance, power-efficient, real-time series that delivers greater than 24 giga-floating-point operations per second using two enhanced SHARC+® cores and advanced DSP accelerators (FFT, FIR, IIR). The ADSP-SC58x and ADSP-2158x series consume less than 2 watts, making the new processor line-up more than 5x more power efficient than previous SHARC products. This advantage provides industry leading digital signal processing performance for applications where thermal management sets the limit for power consumption, or where the higher costs and lower reliability of fans cannot be tolerated. Applications include automotive, consumer and professional audio, multi-axis motor control, and energy distribution systems.
The ADSP-SC58x products complement the SHARC+ cores and DSP accelerators with the addition of an Arm® Cortex-A5 processor, with FPU and Neon® DSP extensions to handle additional real-time processing tasks and manage peripherals used to interface to time-critical data in audio, industrial closed-loop control, and industrial sensing applications. These interfaces includes Gigabit Ethernet, USB High-Speed and a rich variety of other connectivity options for a flexible and simplified system design.
The ADSP-2158x family is designed for applications where a DSP co-processor is exclusively needed and includes two SHARC+ cores and a peripheral set matched to a DSP core.
The new, code-compatible, enhanced SHARC+ core features clock-rate and power-efficiency improvements and adds instruction/data cache options, native double-precision floating-point support, and a number of other new instructions. Designed for low-power and using a low-leakage CMOS process, the ADSP-SC58x/2158x families deliver 500 MHz with 105°C environments in mind and provide a roadmap to future implementations at higher performance. More than 1
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The above table is for reference only, there may will have some delay for the uncontrollable factors.



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